The present invention relates to a double-deck videocassette recorder, and more particularly, to a double-deck videocassette recorder having a single luminance/chrominance signal processor.
A double-deck videocassette recorder generally includes a pair of luminance/chrominance signal processors, for respectively processing the signals picked up from each deck or a composite video signal applied from external equipment. During the operation of such a double-deck videocassette recorder, however, since it is rare to operate (play or record on) two tapes simultaneously, one being loaded on each deck, only one of the processors is usually operated at any given time. Therefore, if the playback and recording functions for each deck could be accomplished by just one luminance/chrominance signal processor, the production cost of the manufactured device would be reduced.